The invention relates to digital signal reproducing apparatus. More particularly, the invention relates to a digital signal reproducing apparatus suitable for use in decoding a digital signal generated by a playback head in, for example, a digital video tape recorder (VTR).
In a digital VTR, direct current (DC) components in recorded digital data used by a playback head (hereinafter referred to as the "reproduced signal") to generate a corresponding signal can be lost because of a differential characteristic of the tape-and-head system. For this reason a decoding circuit is used in a reproducing radio frequency (RF) circuit of the digital VTR (hereinafter referred to as the "reproducing RF circuit") to restore the lost DC components while decoding a digital video signal stored on the tape.
In FIG. 1 there is illustrated a conventional reproducing RF circuit of a digital VTR. As illustrated, a digital signal recorded on a tape 51 is reproduced by a head 52, i.e., a representative electrical signal is generated by the head 52 in view of a sensed magnetic signal. The signal on the tape 51 can be quantitized by, for example, eight (8) bits. The reproduced signal is supplied to an analog decoding circuit via an amplifier 53 (hereinafter a "reproducing amplifier").
The analog decoding circuit 54 decodes the reproduced signal and generates a digital video signal. However, because of a differential characteristic of the tape-and-head system (i.e., tape 51 and head 52), DC components can be lost in the reproduced signal. To compensate for this loss of the DC components, after high frequency components in the reproduced signal are reinforced by the analog decoding circuit 54, the reproduced signal is integrated. By integrating the reproduced signal, the DC components are restored. Thus, the digital video signal represents a decoded version of the original signal on the tape 51.
As further illustrated in FIG. 1, the digital video signal is supplied to a time base variable component (TBC) circuit 57 via a data latch 56. In parallel, the amplified reproduced signal is supplied from the reproducing amplifier 52 to another input of the TBC circuit 57 via a clock reproducing circuit 55. The TBC circuit 57 is used to eliminate time base variable components in the reproduced signal.
The clock reproducing circuit 55 serves to generate a bit clock signal BCK11 from the reproduced signal. It is this signal BCK11 that is supplied to the TBC circuit 57. Additionally, the bit clock signal BCK 11 is supplied to the data latch 56.
In view of the bit clock signal BCK11 supplied thereto, the data latch 56 latches the output of the decoding circuit 54 in synchronization with the bit clock signal BCK11. Similarly, the digital video signal is clocked into a memory of the TBC circuit 57 at a rate determined by the bit clock signal BCK11.
The TBC circuit 57 is also supplied with an additional reference clock signal SCK11 that is generated by a reference clock 59. The TBC circuit 57 thus can eliminate time-base variable components in the reproduced signal because the digital video signal latched into the memory of the TBC circuit 57 is read out with a timing based on the reference clock signal SCK11.
The TBC circuit 57 also is capable of detecting a sync pattern in the reproduced signal. This sync pattern is used to determine a conversion rate for converting serial data to parallel data.
An output of the TBC circuit 57 is supplied to a signal processing circuit 58. The signal processing circuit 58 is also supplied with the reference clock signal SCK11 by the reference clock generating circuit 59. The circuit 58 then performs conventional signal processing in view of the reference clock signal SCK11.
The conventional reproducing RF circuit just described in which the decoding circuit 54 is used in the form of an analog circuit, is influenced by, for example, temperature changes. As a result, the operation of the reproducing RF circuit of FIG. 1 is unstable.
To overcome this instability problem, another circuit arrangement has been employed. This circuit arrangement is illustrated in FIG. 2.
In the circuit arrangement of FIG. 2, instead of using the analog decoder 54, the reproduced signal is first converted to a digital signal via an A/D converter 60, and then the digital signal is decoded by a digital decoder 61. In this manner, the influence of temperature is eliminated because the digital signal and digital circuits will not be as easily influenced by changes in temperature.
Because the reproduced signal includes time base components which are subject to A/D conversion by the A/D converter 60, high speed circuit components must be used. Each time base component must be identified for A/D conversion or it could be lost. To this end, high speed components such as ECL, etc. must be used in the digital decoding circuit 61, in view of the time base variation.
However, use of such high speed components in the digital decoding circuit 61 requires large scale technology wherein power consumption is greater. Further, use of such high-speed components can increase manufacturing costs.